MATLAB EMBEDDED IDE LINK 4 - FOR USE WITH ANALOG DEVICES VISUALDSP PLUSPLUS Manuel d'utilisateur télécharger pdf (Page 38)

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DSP Selection Guide 37

ADSP-21161N

Low-Cost, Single-Instruction, Multiple-Data (SIMD) SHARC

®

Features

Benefits

• 3.3 Volt external/1.8 volt internal

•1 Mbit on-chip SRAM

• 14 zero-overhead DMA channels

• SPI-compatible port for serial host and

peripheral control

•4 SPORTs supporting 128 channel TDM and I

2

S

•12 general purpose I/O lines, 4 IRQ lines,1 timer

• Code-compatible to all other SHARC family DSPs

• Single-Instruction, Multiple-Data (SIMD)

computational architecture – two 32-bit IEEE

floating-point computation units, each with a

multiplier, ALU, shifter, and register file

• 100 MHz (10 ns) core instruction rate

600 MFLOPS peak and 400 MFLOPs sustained

performance

• Dual Data Address Generators (DAGs) with

modulo and bit-reverse addressing

• Zero-overhead looping with single-cycle loop

setup, providing efficient program sequencing

• IEEE 1149.1 JTAG standard test access port

and on-chip emulation

• 225-ball 17 mm x 17 mm PBGA package

•Two 100 Mbyte/S link ports simplify connec-

tion and communication in multiprocessing

systems

• 14 zero-overhead DMA channels mean no

cycles stolen from the core to move data on

and off chip

• Cluster multiprocessing enables universally

addressable memory system

• SDRAM controller for controlling large banks

of DRAM

•4 serial ports allow for 16 channels of data to

be transferred in/out of the DSP

Applications

• High-end consumer audio

• Professional audio

• Automatic car systems

• Finger print recognition

• Medical equipment

• ADSL/cable test equipment

• Multi access motor control

•Voice recognition

• Global positioning

• Power line modems

•Telephony

• MP3 encoder

•Video phones

• Digital broadcast radio

I/O Processor

External Port

Core Processor Dual-Ported SRAM

Addr

DAG1

8 x 4 x 32

Program

Sequencer

Instruction

Cache

32 x 48-Bit

DAG2

8 x 4 x

Two Independent

Dual-Ported Blocks

Timer

Bus

Connect

(PX)

Addr

Data

Data

Data

Data

Addr

Addr

Processor Port

I/O Port

Block 0

Block 1

IOD

64

IOA

32

32

PM Address Bus

DM Address Bus

32

Address

Bus

Mux

24

Data

Bus

Mux

32

Multiprocessor

Interface

Host Port

DMA

Controller

5

Serial Ports

(4)

16

20

IOP

Registers

(Memory

Mapped)

Control,

Status, and

Data Buffers

Data

Register

File

(PEx)

16 x 40-Bit

Mult

Barrel

Shifter

ALU

Data

Register

File

(PEy)

16 x 40-Bit

Mult

Barrel

Shifter

ALU

64

PM Data Bus

DM Data Bus

64

JTAG

Test and

Emulation

6

GPIO

Flags

12

SDRAM

Controller

8

Link Ports

(2)

4

SPI Ports

(1)

The ADSP-21161N is the newest member of

the high performing SIMD SHARC DSP fami-

ly. This device offers the industry’s highest

32-bit DSP performance at a price that will

support consumer applications.

Development Tools

ADDS-2116X-WKSHP

ADDS-21161N-EZLITE

VDSP-SHARC-PC-FULL

VDSP-SHARC-PCFLOAT

ADDS-APEX-ICE

ADDS-SUMMIT-ICE

DSP Workshop

Evaluation Kit

VisualDSP++

VisualDSP++ Floating License

USB-Based Emulator

PCI-Based Emulator

ADSP-21161NKCA-100

ADSP-21161NCCA-100

100

100

225-MBGA

225-MBGA

$24.63

$29.55

N indicates 1.8 volt operation

K = Commercial Temp ( 0ºC to +85ºC case)

C = Industrial Temp ( -40ºC to +105ºC case)

* All pricing is budgetary – subject to change

Model MHz Pin/Pkg

Price*

(1000)

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