MATLAB SIMULINK HDL CODER 1 Manuel d'utilisateur télécharger pdf (Page 38)

9/21/2011

38

Additional Methods for Verification

HDL Verification Techniques

 Co-simulation with MATLAB

– Test Bench

– Component

 Generate vector based test benches for

standalone verification

81

 FPGA-in-the-Loop

Integrate MATLAB Algorithm Development

Co-Simulation with MATLAB

Test Bench



Verify HDL against high

-

level

MATLAB

Verify

HDL

against

high

level

MATLAB design

Component

Rl “Bk”

fi i h d

HDL Simulator

82



R

ep

l

ace a

“B

ro

k

en

”

or un-

fi

n

i

s

h

e

d

block in a full HDL test bench with a

working high level component

 Test alternate algorithms for system

trade-off without developing HDL

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