MATLAB SIMULINK HDL CODER 1 Manuel d'utilisateur télécharger pdf (Page 7)

9/21/2011

7

Memory

 Customized interfaces to

peripherals

Memory

We are going

to focus on

Why do we use FPGAs?

Analog I/O

Digital I/O

ARM

Bridge

Memory

Memor

y

Memory

 High-speed communication

interfaces to other

processors

 Finite state machines, digital

logic, timing and memory

control

FPGA

Analog I/O

Digital I/O

ARM

Bridge

Memory

Memor

y

Memory

to

focus

on

this use case

today

16

DSP

 High speed, highly parallel

DSP Algorithms or Control

Algorithms

DSP

Algorithms

FPGA DesignerSystem Designer

Algorithm Design

System Test Bench

RTL Design

Verification

Separate Views of DSP Implementation

Algorithm

Design

Fixed-Point

Timing / Control Logic

Architecture Exploration

Algorithms / IP

System

Test

Bench

Environment Models

Algorithms / IP

Analog Models

Digital Models

RTL

Design

IP Interfaces

HW Architecture

Verification

Functional Simulation

Static Timing Analysis

Timing Simulation

Behavioral Simulation

Back Annotation

Implement Design

Map

Synthesis

FPGA Requirements

17

Map

Place & Route

FPGA Hardware

Hardware Specification

Test Stimulus

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